Test MP+dmb.sy+data-wsi-rfi-ctrlisb-[fr-rf]

AArch64 MP+dmb.sy+data-wsi-rfi-ctrlisb-[fr-rf]
"DMB.SYdWW Rfe DpDatadW Wsi Rfi DpCtrlIsbdR FrLeave RfBack Fre"
Cycle=Rfi DpCtrlIsbdR FrLeave RfBack Fre DMB.SYdWW Rfe DpDatadW Wsi
Relax=
Safe=Rfi Rfe Fre Wsi DMB.SYdWW DpDatadW DpCtrlIsbdR [FrLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpDatadW Wsi Rfi DpCtrlIsbdR FrLeave RfBack Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X7=x;
2:X1=x;
}
 P0          | P1           | P2          ;
 MOV W0,#2   | LDR W0,[X1]  | MOV W0,#1   ;
 STR W0,[X1] | EOR W2,W0,W0 | STR W0,[X1] ;
 DMB SY      | ADD W2,W2,#1 |             ;
 MOV W2,#1   | STR W2,[X3]  |             ;
 STR W2,[X3] | MOV W4,#2    |             ;
             | STR W4,[X3]  |             ;
             | LDR W5,[X3]  |             ;
             | CBNZ W5,LC00 |             ;
             | LC00:        |             ;
             | ISB          |             ;
             | LDR W6,[X7]  |             ;
             | LDR W8,[X7]  |             ;
Observed
    z=2; y=1; x=2; 1:X8=2; 1:X6=1; 1:X5=2; 1:X0=1;
and z=2; y=1; x=2; 1:X8=1; 1:X6=1; 1:X5=2; 1:X0=1;
and z=2; y=1; x=2; 1:X8=2; 1:X6=0; 1:X5=2; 1:X0=1;
and z=2; y=1; x=1; 1:X8=2; 1:X6=0; 1:X5=2; 1:X0=1;
and z=2; y=1; x=2; 1:X8=1; 1:X6=0; 1:X5=2; 1:X0=1;
and z=2; y=1; x=1; 1:X8=1; 1:X6=0; 1:X5=2; 1:X0=1;
and z=2; y=1; x=2; 1:X8=0; 1:X6=0; 1:X5=2; 1:X0=1;
and z=2; y=1; x=1; 1:X8=0; 1:X6=0; 1:X5=2; 1:X0=1;